Hybrid Nanomemristor or Transistor Logic Circuit

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Memristor crossbars were fabricated at 40 nm half-pitch, using nanoimprint lithography on the same substrate with Si metaloxide-semiconductor  eld effect transistor (MOS FET) arrays to form fully integrated hybrid memory resistor (memristor)/transistor circuits. The digitally con gured memristor crossbars were used to perform logic functions, to serve as a routing fabric for interconnecting the FETs and as the target for storing information.

As an illustrative demonstration, the compound Boolean logic operation (A AND B) OR (C AND D) was performed with kilohertz frequency inputs, using resistor-based logic in a memristor crossbar with FET inverter/ampli er outputs. By routing the output signal of a logic operation back onto a target memristor inside the array, the crossbar was conditionally con gured by setting the state of a nonvolatile switch.

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Such conditional programming illuminates the way for a variety of self-programmed logic arrays, and for electronic synaptic computing. crossbar integrated circuit memristor nanoimprint lithography e memory resistor (memristor), the 4th basic passive circuit element, was originally predicted to exist by Leon Chua in 1971  and was later generalized to a family of dynamical systems called memristive devices in 1976. For simplicity in the exposition of this article, we will use the word ‘‘memristor’’ to mean either a ‘‘pure’’ memristor or a memristive device, because the distinction is not important in the context of the present discussion. The first intentional working examples of these devices, along with a simplified physics-based model for how they operate, were described in 2008.

A memristor is a 2-terminal thin-film electrical circuit element that changes its resistance depending on the total amount of charge that flows through the device. This property arises naturally in systems for which the electronic and dopant equations of motion in a semiconductor are coupled in the presence of an applied electric field. The magnitude of the nonlinear or charge dependent component of memristance in a semiconductor film is proportional to the inverse square of the thickness of the film, and thus becomes very important at the nanometer scale.

Memristance is very interesting for a variety of digital and analog switching applications, especially because a memristor does not lose its state when the electrical power is turned off (the memory is nonvolatile). Because they are passive elements (they cannot introduce energy into a circuit), memristors need to be integrated into circuits with active circuit elements such as transistors to realize their functionality.

However, because a significant number of transistors are required to emulate the properties of a memristor, hybrid circuits containing memristors and transistors can deliver the same or enhanced functionality with many fewer components, thus providing dramatic savings for both chip area and operating power. Perhaps the ideal platform for using memristors is a crossbar array, which is formed by connecting 2 sets of parallel wires crossing over each other with a switch at the intersection of each wire pair.

Crossbars have been proposed for and implemented in a variety of nanoscale electronic integrated circuit architectures, such as memory and logic systems. A 2-dimensional grid offers several advantages for computing at the nanoscale: It is scalable down to the molecular scale , it is a regular structure that can be configured by closing junctions to express a high degree of complexity and reconfigured to tolerate defects in the circuit, and because of its structural simplicity it can be fabricated inexpensively with nanoimprint lithography.

Simulations of these architectures have shown that by removing the transistor-based configuration memory and associated routing circuits from the plane of the CMOS transistors and replacing them with a crossbar network in a layer of metal interconnect above the plane of the silicon, the total area of an FPGA can be decreased by a factor of 10 or more while simultaneously increasing the clock frequency and decreasing the power consumption of the chip. Here, we present the first feasibility demonstration for the integration and operation of nanoscale memristor crossbars with monolithic on-chip FETs.

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